XU2CGA: Xilinx Zynq UltraScale+ MPSoC AXU2CGA FPGA AI Study Board with Customized Fan
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Brand | ALINX |
Ram Memory Installed Size | 2 GB |
Memory Storage Capacity | 4 GB |
Connectivity Technology | USB, Ethernet |
Included Components | Cooling Fan included |
About this item
- Bare Board not come with AL321 USB Platform Cable
- DuCore ARM Cortex-A53 and Dual Core Cortex-R5 Processor
- 16nm FinFET+ Combined with Programmable Logic
- USB 3.0 x 4
- 1 Micro SD Card Slot, Support SD Mode and SPI Mode
- 10/100/1000M Ethernet with RJ-45 Interfaces for Data Exchange
- FPGA Chip XCZU2CG-1SFVC784E
- DDR4, 2GB 64bit, 2400Mbps
- DP Interface, Mini Display Port up to 4K@30Hz or 1080P@60Hz Output
- PCIE Peripherals, Communication Speed up to 5Gbps
Note:
Products with electrical plugs are designed for use in the US. Outlets and voltage differ internationally and this product may require an adapter or converter for use in your destination. Please check compatibility before purchasing.
Products with electrical plugs are designed for use in the US. Outlets and voltage differ internationally and this product may require an adapter or converter for use in your destination. Please check compatibility before purchasing.
The AXU2CGA Board is characterized by its small size and extensive peripherals. The main chip is Xilinx's Zynq UltraScale+ MPSoCs CG family chip, the model is XCZU2CG-1SFVC784E. The PS side is mounted with 2 slices of DDR4 (total 1GB, 32bit) .
The main parameters of the PS system are as follows:
- ARM dual-core Cortex-A53 processor, speed up to 1.2GHz, each CPU 32KB level 1 instruction and data cache, 1MB level 2 cache, shared by 2 CPUs
- ARM dual-core Cortex-R5 processor, speed up to 500MHz, each CPU 32KB level 1 instruction and data cache, and 128K tightly coupled memory
- External storage interface, support 32/64bit DDR4/3/3L, LPDDR4/3 interface
- Static storage interface, support NAND, 2xQuad-SPI FLASH
- High-speed connection interface, support PCIe Gen2 x4, 2xUSB3.0, Sata 3.1, Display Port, 4 x Tri-mode Gigabit Ethernet
- Common connection interface: 2xUSB2.0, 2x SD/SDIO, 2x UART, 2x CAN 2.0B, 2x I2C, 2x SPI, 4x 32b GPIO
- Power management: support the division of Full/Low/PL/Battery four parts of power
- Encryption algorithm: support RSA, AES and SHA
- System monitoring: 10-bit 1Mbps AD sampling for temperature and voltage detection
The main parameters of the PL logic part are as follows:
- Logic Cells: 103K; flip-flops : 94K
- Lookup table (LUTs) : 47K; Block RAM: 5.3Mb
- Clock Management Unit (CMTs) : 3; Multiplier 18x25MACCs: 240
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