XC7Z020-1CLG484I

XC7Z020-1CLG484I is a part of the first-generation Zynq-7000 SoC family, featuring a unique integration of Xilinx programmable logic (PL) and a dual-core or single-core ARM Cortex-A9 based processing system (PS). The key attributes of the Processing System (PS) are as follows:

ARM Cortex-A9 Based Application Processor Unit (APU):

  • 2.5 DMIPS/MHz per CPU
  • CPU frequency: Up to 1 GHz
  • Coherent multiprocessor support
  • ARMv7-A architecture
  • TrustZone® security
  • Thumb®-2 instruction set
  • Jazelle® RCT execution Environment Architecture
  • NEON™ media-processing engine
  • Single and double precision Vector Floating Point Unit (VFPU)
  • CoreSight™ and Program Trace Macrocell (PTM)
  • Timer and Interrupts
  • Three watchdog timers
  • One global timer
  • Two triple-timer counters

Caches:

  • 32 KB Level 1 4-way set-associative instruction and data caches (independent for each CPU)
  • 512 KB 8-way set-associative Level 2 cache (shared between the CPUs)
  • Byte-parity support

On-Chip Memory:

  • On-chip boot ROM
  • 256 KB on-chip RAM (OCM)
  • Byte-parity support

External Memory Interfaces:

  • Multiprotocol dynamic memory controller
  • 16-bit or 32-bit interfaces to DDR3, DDR3L, DDR2, or LPDDR2 memories
  • ECC support in 16-bit mode
  • 1GB of address space using a single rank of 8-, 16-, or 32-bit-wide memories
  • Static memory interfaces
  • 8-bit SRAM data bus with up to 64 MB support
  • Parallel NOR flash support
  • ONFI1.0 NAND flash support (1-bit ECC)
  • 1-bit SPI, 2-bit SPI, 4-bit SPI (quad-SPI), or two quad-SPI (8-bit) serial NOR flash

8-Channel DMA Controller:

  • Memory-to-memory, memory-to-peripheral, peripheral-to-memory, and scatter-gather transaction support

XC7Z020-1CLG484I stands out as a versatile FPGA chip with a rich set of features, combining ARM Cortex-A9 processing capabilities with Xilinx programmable logic for a wide range of applications.

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